Integrated circuit chips are typically mounted on lead frames which are connected to the circuit board by rows of conductive pins. Bonding wires extend from the output pads on the chip to adjacent pads on the lead frame. Lead frame wires extend from the adjacent pads to the conductive pins.
As output transistors are switched on and off at higher speeds, larger di/dt transients are generated in the output current flowing through the packaging wires that connect the pad to the circuit board. This increased rate of current change generates noise comprising voltage spikes on the power rails. The magnitude of the voltage spikes generated along the packaging wires between the chip power pad and the conductive pin is the measurement of di/dt multiplied by the inductance of the lead frame. The voltage spikes cause a voltage differential between the lead location on the circuit board and the bonding pad it is connected to on the integrated circuit. They cause troublesome random events in the chip circuitry such as causing the internal supply to be a different voltage than the voltage of the external supply.
One approach used in the prior art to decrease noise on the power rails was to decrease the slew rates at which transistors on the power rails switched on and off. FIG. 1 illustrates a circuit implementing this approach. The prior art circuit comprises an output buffer 190 and a device driver circuit 191. A signal from sense amplifier line 110 is sent to pull-up inverter 115 and pull-down inverter 116 in output buffer 191. Pull-up inverter 115 controls the gate of output switch 125 in device driver 191 by controlling the voltage on slew node 120. Pull-down inverter 116 controls the gate of output switch 126 in device driver 191 by controlling the voltage on slew node 121. The switch rate of output switches 125 and 126 determines the magnitude of di/dt on output pad 140. Resistor 130 is coupled between pull-up inverter 115 and ground and decreases the rate at which the voltage on slew node 120 is driven to ground. Resistor 131 is coupled between pull-down inverter 116 and ground and decreases the rate at which the voltage on slew nodes 121 is driven to ground. This decreases the rate at which output switches 125 and 126 are turned off, thus decreasing noise at the output pad 140.
Although the implementation of resistive elements to decrease the slew rate at which the slew nodes are driven to ground decreases noise at the output pad, the speed at which the integrated circuit switches is also affected. The prior art solution decreases the slew rate of the slew nodes even when di/dt is not at high rate. This often slows the performance of the integrated circuit unnecessarily. Moreover, the prior art approach fixes the slew-rate at a predetermined level, making it unadjustable to accommodate the noise level difference among different packages which have different lead frame inductance.
Thus, an output circuit which can variably control the level of noise on its I/O pad while maintaining an optimal switching rate is desired.